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Switching Edge Control for EMC – Power Supply Design Tutorial Section 4-2

This section will conclude the part of the tutorial dedicated to edge control for optimum-radiated EMI. And apart from first viewing section 4-1, I encourage you to also view  part 3, on PCB layout, as a complement to best practice for electromagnetic compatibility in general.

Section 4-2 Agenda

  • Edge control for internal power switches
    • Bootstrap resistors
    • Low side R-C snubbers
    • High side R-C snubbers
  • Synchronous buck example
  • Power modules with integrated magnetics
  • Advanced techniques: ferrite chip beads vs. bootstrap resistors

Since section 4-1 focused on circuits with external MOSFETs, section 4-2 first examines edge control and regulars with internal power switches but external inductors, presenting the bootstrap resistor method and application of R-C snubber filters to both high side and low side switches. A non-synchronous buck is used as an example, and a brief explanation of how a synchronous buck regulated differs is also presented.


Techniques with Internal MOSFETs

So far, we’ve only looked at switches with external MOSFET. But controllers with external FETs are most certainly not the trend in power management. Quite the opposite, in fact. More and more of the power path components are being brought inside the package. In general, this is good for EMI, but nothing is perfect. So, let’s look at some techniques for switches with internal power switches but external inductors, the type of device that’s usually called the switching regulator.

This typical block diagram from a non-synchronous buck regulator makes it clear that no access is provided between the output of the drive circuit and the base of the power NPN. We’ve lost a degree of flexibility, but the good news is that no huge mismatch between the driver and power switch will exist, since the silicon designer created both driver and switch to work together.

This means that the rising edge slew rate tends to be in that 20 to 50 nanosecond compromise zone, where overshoot isn’t so bad, but switching loss is reasonably low.

When the rising edge is still too fast, and/or when there’s a lot of parasitic capacitance and inductance, an alternative point to slow the rising edge is with the charge pump that supplies the positive input of the driver.

See that pin labeled boost? That’s where a diode and a capacitor form this charge pump, and that’s another point of attack.

 

This particular circuit is providing a 3.3V output at 3A through 12V input. That’s the maximum output power, the place where edge control should be performed. Looking at both the switch node with DC coupling and the output voltage with AC coupling gives us an idea of the noise we’ll have to deal with.

Thanks to a good layout, transience and ringing of around 5V peak to peak at the switch mode are reduced to around 500mV peak to peak at the output. But that still could be too much for a sensitive digital load.

By zooming in, we can see that the rising edge is indeed quite fast. It’s also the right time to talk about the price that you pay for applying edge control. That price is lowered efficiency. So, on this slide, with no edge control at all, we have an input current of 980mA. Keep that in mind as we move forward.

I want to reiterate that this type of testing must be done at the maximum load. Many times when you test a switcher, you start at no load, or at least you start the converter with no load, and then apply a load once the output is stable. This is standard practice. But unless the layout is really terrible, you won’t see much ringing at no load, because there isn’t much energy in the junctions of the power switches.


Converters with “Bootstraps” Provide a Point to Slow Rising FET Gate

If the regulator in question has a floating switch, that’s mainly buck regulators, but many buck boost regulators also do this, then there actually is a great way to slow the rising edge of the switch node voltage. And that’s by adding resistance in series with the charge pump circuit, or bootstrap. If you’re interested in more detail about bootstraps, look at slide 11 of section 2-3 of this webinar series.

The external capacitor provides the charge to enhance the floating end fit, or to forward bias the base to emitter of an NPN. This capacitor’s almost always external, because it would take a huge amount of silicon [die area 00:03:50] to make such a big capacitor. Die area means cost, so bootstrap caps are external, discrete devices most of the time.

A resistor placed in series with that capacitor, or with the boot or boost pins, limits the flow of current. But only for the turn on of the high side switch, Q1 in this case. Recall that you rarely if ever want to slow the turnoff of the control switch. This kills efficiency in non-synchronous devices, and may cause destructive shoot-through in synchronous bucks.


With CBOOT Resistor

My method for selecting the bootstrap resistor is exactly the same as my method for the gate resistor. Put a 20 or 50 ohm tremor potentiometer set to zero, being careful not to tear up the PCB traces, especially when trying to wiper dial. And adjust upwards until the overshoot is reduced as much as possible without completely killing the efficiency.

Here, the overshoot is practically gone, but the green remains. So the ripple at the output is halved, but there’s still around 300mV peak to peak. That’s just under 1% for a 3.3V output, and that might be good enough for some loads, but not all.

VIN, VOUT, and IOUT are all the same as before. But the converter now draws an additional 20mA of input current. That’s the price we pay for edge control.

Let’s assume that the 300mV peak to peak output voltage ripple is still too high, and explore the next option. This R-Cs number is exactly the same as the one used on the two controllers, since the low side switch in this circuit is a discrete Schottky diode, D1. Here, I use the power budget method to pick this number capacitor of 2.2nF. And I put my 100 ohm tremor pot in for RSN1 as shown here in the schematic.

RSN1 was initially set to 100 ohms. And as before with the controllers, I could have calculated the ideal mathematical damping resistance and dialed the pot to that value. But it’s nice and quick to just start at the maximum resistance of the pot. 


With Low-Side Snubber, Detail

This response is improved, but not critically damped. You can still see about four ringing periods. I could have gone back and tried again with the frequency hopping method number two, outlined in section 4-1, if I wanted an even better response. I paid the price of another 14mA of input current, though, and a largest number capacitor would increase this penalty.

One way to tell fairly quickly if the capacitor value is too low, or, although this is unlikely, too high, is to dial the potentiometer all the way to its minimum value. The ringing amplitude usually increases, but if you recall the steps in my method number two, it’s frequency that becomes important. As number capacitance in the correct range for two critical damping will cause the ringing frequency to decrease to around half its initial value. It’s easier to measure the ringing period on an oscilloscope. You can see that my scope here got confused between the switching frequency and the ringing frequency. So, for practical purposes, look for a ringing period that more or less doubles. If it only increases by 10% or 30%, it’s not enough capacitance.

 

So far, we’ve cleaned up the rising edge of the switch node quite nicely, down to around 100mV peak to peak for the output voltage ringing on the rising edge. But now, by comparison, the falling edge actually looks pretty bad, with around 400mV peak to peak of output voltage ripple. With this capture at 100 nanoseconds per horizontal division, you can see that the falling edge is also quite steep.

We can’t directly slow it with gate resistors or boot resistors, because this element is a diode. So the best way to deal with a falling edge that’s too fast is with another R-Cs snubber.


Treating the Falling Edge with a Snubber

The control switch is internal, but we have access to both terminals whenever the power inductor is external. So, going again with the power budget approach, my method number one, and allotting 100mW of power budget, we take another 2.2nF number capacitor, dial our tremor pot back up to 100 ohms, and solder them in as shown, and solder them in as shown between the VIN and SW pins with the regulator IC. Hopefully, this goes without saying now, but unless this number components go in as close as possible to the VIN and SW pins, in the tightest possible loop, we won’t achieve anything useful with this filter.


Falling Edge Detail – no Snubber

Just to absolutely clear, none of our rising edge solutions do anything at all for this very fast falling edge. The undershoot, around 4V, and the corresponding noise of around 400mV peak to peak in VOUT, are now the biggest noise sources in the system.

 

This slide shows the falling edge after adjustment of this number in parallel with the high side switch. And while the initial undershoot has been reduced by about half, the noise on VOUT is not much reduced. Recall that this test was done using my first method, the power budget one. And the drawback is that C snub might not be enough to critically damp.

If I was working on a circuit and a customer told me they still had problems, for example a touch screen that stopped working, I would come back and try the critical damping method to see what further improvements could be made. Note that the input [inaudible 00:08:17] here is 1014mA. When I took this scope shot, the low sides number wasn’t connected. Only the bootstrap resistor was in place to do the rising edge.


Efficiency Loss Summary

  • Original circuit: IIN = 979 mA, η = (3.3 * 3.0) / /12.0 * 0.979) = 84,2%
  • With boot resistor:
    • IIN = 999 mA, η = (3.3 * 3.0) / /12.0 * 0.999) = 82,5%
  • With boot resistor and low-side snubber:
    • IIN = 1013 mA, η = (3.3 * 3.0) / /12.0 * 1.013) = 81,4%
  • With boot resistor, low-side and high side snubbers (est´d):
    • IIN = 1027 mA, η = (3.3 * 3.0) / /12.0 * 1.027) = 80,3%

Nothing comes for free!

The more you reduce the rate of the switching edges, the more power you burn on switching loss. It’s as simple as that. However, treating high frequency noise and transience and ringing at the source is more efficient than filtering from a power perspective, and far more efficient from a cost perspective. More than once, I’ve seen engineers become desperate, and start adding in-line ferrite beads to every cable coming in and out of their device, or paying top dollar for metal enclosures to create a Faraday cage. Sometimes these expensive solutions are necessary, but proper gate or bootstrap resistors and well-tuned snubbers cost very little. These are penny or less components in most cases.


Synchronous Buck Regulator

  • Internal power FET for low-side instead of a Schottky diode
  • Much lower parasitic capacitance – but the body diode has reverse recovery charge
  • Loops and connections are smaller -> less parasitic L
  • Boot resistor can slow turn-on, but no easy way exists to slow the turn-off
  • Gate drive is matched to size (capacitance) of each power FET

Let’s look at a circuit that operates with the same VIN and VOUT and IOUT as a previous buck, but this time, it’s a monolithic, synchronous device. The body diodes aren’t drawn in the MOSFET symbols, but they are there, and they have the same reverse recovery charge to deal with.

One thing you can try with this type of circuit is placing a small external Schottky diode in parallel to the low-side MOSFET. It has to be as absolutely close as possible to the switch node, written as PH in this device, and the ground pins. But even then, the inductance of the bond wires connecting the silicon to the pins of the package often have enough inductance to render that Schottky useless. 3A

This synch buck is also delivering 3.3V at 3A from a 12V input. But there are several things that make it different from the previous, non-synchronous buck. One is the dead time. There’s a bolt just before and just after the switch node rises to VIN. For about 20 nanoseconds after the low-side switch turns off, the high-side switch stays off too, leading to the slight voltage dip. A bit of power is wasted, but it’s a fair price to pay, since both MOSFETs on simultaneously means shoot-through, and near-certain death for our power supply.

The dip down to around 1.5V or so, as the switch node slews down to zero, is the time the body diode, the low-side FET, is on. Once the channel enhances, the negative voltage drop is equal to the low current multiplied by the RDS(on). And at this vertical resolution, that’s pretty much zero volts.

Another thing worth mentioning is why the ringing is more controlled. This has to do with a good match between the driver and the internal FETs. But also with the very fact that this device is monolithic. Everything is nice and close together.

Yet another important aspect is the packaging. The non-synch buck used the SOA package, with its traditional pins and bond wires. This synch buck uses a QFM package. They’re a pain to rework by hand, yes. But even when the silicon connects with internal bond wires, these are shorter, and the short pins, basically little cubes of copper, also make lead inductance a lot lower.


Rising Edge Detail – Falling Edge Detail

Zooming in reveals nearly no overshoot. But the VOUT sees just over 200mV peak to peak of high-frequency ripple. Now, if you want to know why a synchronous monolithic buck regulator costs more than a non-synchronous one, this efficiency gain is one reason. To be even more blunt, it takes more silicon die area to make that larger lower RDS(on) synchronous MOSFET too. To reduce this noise, I would again start with the resistor in series with the bootstrap pin, followed by an RCs number placed in parallel with the low side switch.

 

The falling edge also generates some noise, and if needs be, could be treated with a snubber as well. If this were a controller, then the gate resistor would be my first choice. But since the driver in the low side MOSFET are both internal to the package, the snubber is the only way to go.


Integrated Magnetic Modules

For the record, although customers love switching modules with integrated inductors because they’re so easy, and semi-conductor companies love them because they fetch higher prices and higher margins, I find modules to be no fun, because they nearly always work. A really bad layout can cause problems, but simply copying the demo boards or evalboard layouts will work 99% of the time. More and more power management IC makers are providing customers with the schematics and Gerber files with their eval boards directly on their websites. If you don’t see the design files for a design you’re interested in, ask the field salespeople, and in most cases, you’ll be rewarded.

Even though they’re boring to me, modules have a feature that I think even the marketing departments haven’t hyped enough. Low EMI. Especially radiated EMI. Pretty much the only way you can make a bad layout with radiated EMI problems is by not placing the input capacitors right next to the VIN and ground pins. Every module worth using has these pins placed as close together as functional isolation will allow to facilitate this.

Not only that, but the small, low-value MLCC input cap I recommended is placed internally. The switch node is set in a very tight loop, and that minimizes the area of the resulting antenna. One of the few drawbacks to modules is that if you wanted to slow the switching edges, well, you can’t. Except for a few products with special pins for this purpose.

We can’t directly probe the switch node voltage, since that node isn’t available externally. Therefore, we have to focus in on the output voltage ripple. By now, hopefully you’ve seen enough to guess that the higher of the two spikes is the rising edge of the switch node. This plot was taken on the product’s demo board, using the low inductance probe technique. If these spikes, which are a bit under 200mV peak to peak, are a problem, then ferrite beads in series with the output voltage power lines will probably be needed.

Zooming in to 20mV per vertical division, we can see why digital loads and modules make a great pair. Switching frequency ripple is perhaps 5mV peak to peak. A little cleanup of the high-frequency ringing with some series ferrite beads should reduce this ringing to the same level as the switching frequency ripple. And then even fancy digital loads like FPGAs are unlikely to complain about a 5mV peak to peak ripple.


To Check Switching Frequency of a Module

Checking for a regular, triangle-shaped inductor current wave form is a basic test of your switcher’s health, like taking your blood pressure at the doctor’s office. You won’t always get a perfect triangle wave shape, because more and more modules have a small amount of internal output capacitance too. But you should get enough signal to check for a regular frequency. The square wave shape of the output voltage indicates that ESL dominates over ESR or capacitance droop, thanks to a bank of purely MLCC output capacitors.


To Check Switching Frequency of a Module

There’s another way to check both the switching frequency and to see the basic wave shape of the switching node for power modules. And that’s to lay a scope probe with the pigtail and cap removed on or near the top of the part. Naturally, since the probe body is ground, be careful not to short-circuit anything else. You might have to move the tip around, adjust the volts per division on the scope, or change the orientation by 90 degrees in the x, y, or z planes. But eventually, you’ll see this switch node wave form pop up on your screen, like this.

The amplitudes are not correct, since this signal is induced by a field whose coupling coefficient is pretty much unknowable. But you can see proper, regular switching, some ringing, and also the dead times, before and after the rising and falling edges, respectively.


Advanced Techniques

Using ferrite beads in place of bootstrap resistors

A word of caution. This next technique can be wonderful, but it can also blow up a lot of power devices. If you’re going to try it, have five or ten spare controller ICs and more spare power FETs if they’re discrete parts.

A pre-heating base and hot air rework station is remarkably cheap, and you can get both for around 100 Euros. That and some long, fine tweezers, so you don’t burn your fingers as you take old parts off and put new ones on.

We’re focusing on the high-side switch of a buck regulator, specifically an N-MOSFET or NPN BJT with a bootstrap circuit.

As previously discussed, a gate resistor slows both rising and falling edges, whereas our current limiting element in series with the boot pin only slows the rising edge. 


Ferrites in Gate -> Melted MOSFETs

I used a pretty high-powered buck to test this idea, with nearly 50W of output power. No single MOSFET lasted more than three seconds when I put ferrite beads in place of the high-side gate resistors. That meant I couldn’t actually capture a scope shot showing the shoot-through, but trust me, when power devices smoke and burn that quickly in a synchronous buck, it’s a sure bet that shoot-through did it. 

Every voltage measured in the following slides uses the low-inductance technique to make sure that we’re looking at genuine conducted signals.

 

The higher the power, the higher the transience and the more energetic the ringing. There are close to 3V peak to peak of high-frequency output noise here. That might not be a problem for the circuit operation, since 12V, which is the output voltage, is often an intermediate power rail, and the subsequent power converters can remove this noise. But those 12V might also be powering a sensitive op-amp, in which case the ringing must be tamed.

The nearly 8V peak to peak of input voltage ripple is another concern entirely, since this 48V input could be a telecom back plane bus with conducted EMI limits. Notice that there are two distinct frequencies in the first few rings that then die down into one main fundamental. This happens with big voltage swings, because the parasitic capacitance of MOSFETs changes would drain the source voltage. And a 48V change is enough to make this quite evident. It’s the lowest frequency fundamental that we’re going to attack.

 

With a circuit set to the highest output power and then nominal input voltage, zoom in and measure the period of the highest amplitude ringing wave form. If you watched part two of this webinar, I said several times that the worst case is usually when VIN is at its lowest. But most EMC standards test at the nominal input voltage.

So this plot was taken at 48V in exactly. Here, the period, the lower frequency, higher amplitude oscillation is around 6.6 nanoseconds. That’s almost exactly 150mH.

 

The selection process is a lot easier than the tuning of a resistor. Simply find the service mount ferrite bead with a high resistance at the ringing frequency.

Take note here that it’s resistance R and not impedance Z that we’re interested in. Typical sizes for the chip beads are 0603 and 0805. You’ll also want to calculate the average current and make sure that the ferrite won’t overheat. Average current is simply the total gate charge of the MOSFET or MOSFETs being driven, multiplied by the switching frequency. Even though the peaks can be in amperes, the averages are usually in the milliamp range. For reference, 0603 and 0805-size chip bead ferrites typically can handle anywhere from 50mA to over 1A of average current.

 

Expect 0603 and 0805-size chip beads to cost more than resistors of the same size. But they still cost only a few pennies, even at low volumes. This means that for around $.03 or less, you can reduce the input ringing by half, to run 4V peak to peak, and then the output voltage ringing in to around one-third, or maybe 1V peak to peak.  


Comparison with Tuned Boost Resistor

One thing I haven’t actually shown empirically yet is putting a carefully-tuned resistance in series with the bootstrap pin. As a comparison, this slide here shows a result that was carefully adjusted, the same technique outlined in section 4-1 for gate resistors. It took me about half an hour to follow my standard procedure, setting a tremor pot to zero, soldering it in, adjusting it, watching the scope and the input current, removing the pot, measuring its value, finding the closest 1% resistor value, and soldering that value back in. It’s not a super long process, but in comparison, it took me about 10 minutes to solder in the two different ferrite beads that I tried, and I got comparable result.

All edge control incurs an efficiency penalty

I don’t have a scope capture for the results for the 600 ohm ferrite bead, but they definitely were not as good as the 2200 ohm part, or the tuned resistor. All three gate control elements increased power dissipation and reduced efficiency, but the 2200 ohm ferrite was actually a bit better than the tuned resistor.


Next up:  Section 5-1 The DC-DC Boost Converter

Section 5 of this series turns to the boost converter, in DC to DC applications. To be clear, the other common use of the boost converter is for AC to DC power supplies. And that requires a complete and separate treatment. When I say DC to DC, I mean converters with an input voltage that is positive and does not move up and down quickly.

Link to next section:  5-1 DC-DC Boost Converter


Link to previous section:  4-1 Switching Edge Control for EMC

 

 

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